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2 changes: 2 additions & 0 deletions target/ast1060-evb/BUILD.bazel
Original file line number Diff line number Diff line change
Expand Up @@ -60,6 +60,8 @@ rust_library(
deps = [
"@oot_crates_no_std//:ast1060-pac",
"@pigweed//pw_status/rust:pw_status",
"@pigweed//pw_kernel/arch/arm_cortex_m:arch_arm_cortex_m",
"@pigweed//pw_kernel/kernel",
"@oot_crates_no_std//:aspeed-ddk",
"@oot_crates_no_std//:embedded-hal",
"@oot_crates_no_std//:embedded-io",
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10 changes: 7 additions & 3 deletions target/ast1060-evb/console_backend.rs
Original file line number Diff line number Diff line change
Expand Up @@ -12,12 +12,14 @@ use core::sync::atomic::{AtomicBool, Ordering};
use pw_status::{Error, Result};
use ast1060_pac::Peripherals;
use embedded_io::Write;
use kernel::sync::spinlock::SpinLock;

use aspeed_ddk::uart::{Config, Parity, StopBits, UartController};

// Global UART controller instance
// Global UART controller instance wrapped in a spinlock
static mut UART_CONTROLLER: MaybeUninit<UartController<'static>> = MaybeUninit::uninit();
static UART_INITIALIZED: AtomicBool = AtomicBool::new(false);
static UART_LOCK: SpinLock<arch_arm_cortex_m::Arch, ()> = SpinLock::new(());

struct DummyDelay;

Expand Down Expand Up @@ -73,8 +75,10 @@ pub fn console_backend_write_all(buf: &[u8]) -> Result<()> {
return Err(Error::Unavailable);
}

// Safety: logical singlton access pattern guarded by UART_INITIALIZED.
// In a real multi-threaded kernel we'd need a spinlock here.
// Acquire spinlock to ensure exclusive UART access
let _guard = UART_LOCK.lock(arch_arm_cortex_m::Arch);

// Safety: exclusive access is guaranteed by the spinlock guard above.
let controller = unsafe {
&mut *(core::ptr::addr_of_mut!(UART_CONTROLLER) as *mut UartController<'static>)
};
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