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feat: add riscv64 to Linux wheel build matrix#289

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gounthar wants to merge 2 commits intoindygreg:mainfrom
gounthar:feat/riscv64-wheels
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feat: add riscv64 to Linux wheel build matrix#289
gounthar wants to merge 2 commits intoindygreg:mainfrom
gounthar:feat/riscv64-wheels

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@gounthar gounthar commented Mar 12, 2026

Summary

Add linux_riscv64 wheels to the build matrix using manylinux_2_28_riscv64.

Changes

  • Add riscv64 include entries for cp310-cp314t (manylinux_2_28 only)
  • Extend QEMU condition to include riscv64
  • Add CIBW_MANYLINUX_RISCV64_IMAGE env var

Why include entries?

riscv64 only has manylinux_2_28 (no manylinux2014, no musllinux). The existing excludes block manylinux_2_28 for cp39-cp313. Using include entries bypasses those excludes cleanly without restructuring the matrix.

Evidence

Context

  • manylinux_2_28_riscv64 is available in pypa/manylinux
  • cibuildwheel 3.x supports riscv64 via QEMU
  • Several packages already ship riscv64 wheels: aiohttp, yarl, multidict, propcache
  • RISC-V hardware is shipping (SiFive, SpacemiT, Sophgo SG2044)

Ref: #288


Note: this work is part of the RISE Project effort to improve Python ecosystem support on riscv64 platforms. Native riscv64 CI runners are available for free via RISE RISC-V runners.

Add manylinux_2_28_riscv64 wheel builds via QEMU emulation.
Uses include entries since riscv64 only has manylinux_2_28
(no manylinux2014, no musllinux).
Add manylinux_2_28_riscv64 builds for cp310-cp314t via include entries.
Include entries bypass the existing manylinux_2_28 excludes that would
otherwise block riscv64 combinations.
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