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Fix/verilator v4.228 upgrade#136

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ping-long-github wants to merge 2 commits intopulp-platform:mainfrom
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Fix/verilator v4.228 upgrade#136
ping-long-github wants to merge 2 commits intopulp-platform:mainfrom
SiliconLanguage:fix/verilator-v4.228-upgrade

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Summarize the changes concisely

Changelog

Added

Changed

Fixed

(Reference to issues, labels, and related merge requests)

Checklist

  • Automated tests pass
  • Changelog updated
  • Code style guideline is observed

Please check our contributing guidelines before opening a Pull Request.

Add BUILD_GUIDE.md documenting a complete from-source build and simulation
workflow on Ubuntu 24.04 without sudo access, covering:
- Host dependency builds (m4, bison, flex, texinfo, GMP/MPFR/MPC, autoconf,
  dtc, libelf) into ~/.local
- RISC-V GCC cross-compiler build and known issues with GCC 13
- Verilator build (v4.228 upgrade to fix v4.218 internal fault on fpnew RTL)
- Successful hello_world run on the minpool (16-core) configuration
- Summary table of all 14 issues encountered and their resolutions

Add a 'Simulation Performance and Resource Considerations' section to
README.md documenting that the default 256-core Verilator simulation can
exhaust host memory due to serialized mempool_barrier synchronization and
per-hart tracing I/O, with recommendations to use minpool for interactive
work or provision 64 GB+ RAM for full-scale runs.
Verilator v4.218 (e6554e0) crashes with an internal fault in the
V3AssertPre pass when elaborating the fpnew FPU RTL, specifically on
LITENDIAN vector constructs. The error manifests as:

  %Error: Internal Error: ... V3AssertPre.cpp ...

This is a known bug fixed in later Verilator releases. Bump the
submodule to v4.228 (746c7ea) which resolves the issue and includes
~20 additional bug fixes and improvements.

Tested with config=minpool (16-core) hello_world — simulation completes
successfully with retval=0.
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